1. Field of the Invention
The present invention relates to a photoelectric conversion apparatus and a camera using the same in focus detection thereof and, more particularly, to a photoelectric conversion apparatus which optimally controls signal storage and signal processing for performing focus detection in accordance with the brightness of an object to be photographed, and a camera using the same in focus detection thereof.
2. Description of the Related Art
Conventionally, various techniques of storing photoelectrically converted signals in a focus-detection photoelectric conversion apparatus such as a camera have been proposed.
As an example, U.S. Pat. No. 4,870,441 discloses a technique in which the storage time and the amplification factor of photoelectrically converted signals are selected after focus detection is started.
In this conventional technique, when a predetermined time elapses from the start of storage of photoelectrically converted signals, the storage level of the output from a storage monitor is compared with a predetermined level. The storage time and the amplification factor are determined on the basis of the comparison result.
In this conventional technique, therefore, the storage time can be efficiently controlled in accordance with the brightness of an object to be photographed.
FIG. 15 is a block diagram showing the arrangement of a photoelectric conversion apparatus according to the above conventional technique.
As shown in FIG. 15, an amplification factor controller 102 connected to a CCD (Charge-Coupled Device) image sensor 101 as a photoelectric conversion device includes a storage time monitor control unit for monitoring signals photoelectrically converted by the CCD image sensor 101.
In accordance with the characteristics of the photoelectrically converted signals monitored by this storage time monitor control unit, the amplification factor for the signals photoelectrically converted by the CCD image sensor 101 is determined.
That is, when a monitor signal MOS.sub.1 from the CCD image sensor 101 is applied to a pair of comparators 104 and 106, the comparators 104 and 106 compare the magnitude of the monitor signal MOS.sub.1 with reference voltages Vref1 and Vref2 generated by reference voltage generators 103 and 105, respectively.
The comparison results from the comparators 104 and 106 are used by a selector constituted by a flip-flop 107, switches SW.sub.1, SW.sub.2, SW.sub.3, and SW.sub.4, and an inverter 109 to determine whether an original storage output signal OS.sub.1 from the CCD image sensor 101 is to be passed through an amplifier 108, i.e., whether an amplification factor A is to be switched (A=32) or not to be switched (A=1).
Switching of the amplification factor performed by selecting the switches SW.sub.1 to SW.sub.4, is determined according to a signal T.sub.1 which is generated when a predetermined time elapses after the start of storage and applied to the clock terminal of the flip-flop 107, and an output level from the comparator 106 at that signal generation timing. The characteristic of the switching changes in accordance with the storage monitor output, i.e., the brightness of an object to be focus-detected.
An original storage output signal OS.sub.2 amplified on the basis of the amplification factor thus selected is applied to a central processing unit (CPU) for performing well-known focus detection processing via an analog-to-digital (A/D) converter (not shown) in order to perform predetermined signal processing.
Note that a monitor signal MOS.sub.2 from the inverter 109 is output to a CCD driver (not shown) to perform transfer control for the CCD image sensor 101.
In the above conventional technique, however, although storage control for signals photoelectrically converted by the CCD image sensor can be performed efficiently, the sizes of the controller and its peripheral circuits are increased. That is, the controller and its peripheral circuits of the scale as illustrated in FIG. 15 are required.
In addition, the above conventional technique requires either taking a variation margin into consideration in setting the storage end level, or an adjustment unit including a D/A converter for converting an A/D-converted signal into an analog signal again and adjusting the signal. This further increases the load on the peripheral circuits and complicates the system configuration.